The present invention relates to an on-chip circuit for use in a semiconductor device for sensing externally applied voltage thereto, wherein the circuit is coupled to a circuit of special mode in the semiconductor chip to simplify the test and evaluation thereof, and more particularly a circuit for producing signals to enable the operation of the circuit of special mode by sensing the externally applied signal to the chip or for supplying the externally applied voltage directly to the circuit of special mode.
As the semiconductor memory has been highly integrated into large scale and efforts made to attain more reliability in its application, the semiconductor chip itself has contained a circuit for various testing modes other than a normal Read/Write mode or a circuit for measuring various electrical characteristics of the chip. Such a special mode circuit does not work in the normal read/write mode, producing no influence upon the chip. Further, the circuit of special mode serves as a buffer to transfer the signal of externally applied voltage over a certain voltage level into the inside of the chip or usually includes a sensing circuit for producing a signal to enable the circuit of special mode and disable the circuit of normal Read/Write mode.
FIG. 1A illustrates an embodiment of a prior art circuit for sensing high voltage which utilizes the high threshold voltage of a conventional field effect transistor and FIG. 1B the output characteristic thereof. Referring to FIG. 1A, field effect transistor 1 has a gate receiving the input voltage of Vi, a source connectable with the ground voltage Vss and a drain connected with node point 4. The threshold voltage of the transistor 1 is equal to or more than 5 volts. P-channel MOS field effect transistor (MOSFET) 2 has a drain connected with the node point 4, a source connected with source supplying voltage Vcc and a gate grounded. To the node point 4 is connected inverting gate 3.
If the input voltage Vi applied to field effect transistor 1 is lower than the threshold voltage, the transistor is in an off-state. However, P-channel MOSFET 2 with a grounded gate, is in an on-state, and therefore, the voltage of node point 4 maintains the level of source supplying voltage Vcc, thereby keeping the output voltage Vo of the inverting gate in the state of logic low level. Although FIG. 1A illustrates an example that the P-MOSFET 2 whose gate is grounded is placed between the field effect transistor 1 and the source supplying voltage Vcc, an N-MOSFET whose gate is connected with the source supplying voltage may be used instead of the P-MOSFET 2. If an N-MOSFET transistor is used and the input voltage Vi is less than the threshold voltage of the field effect transistor 1, the voltage of node point 4 will amount to the difference between the source supplying voltage Vcc and the threshold voltage of the N-MOSFET and therefore, the output voltage Vo of inverting gate 3 maintains the logic low level. If the input voltage Vi continuously increases towards a value more than the threshold voltage of field effect transistor 1 as a voltage V2 shown in FIG. 1B, a fixed amount of current flows through the field effect transistor 1, and therefore the voltage of node point 4 becomes lower. If the voltage of node point 4 becomes low enough to trip the inverting gate 3, the output voltage Vo is turned over into the logic high level as V1 shown in FIG. 1B, and the voltage applied to the input terminal serves to operate the circuit of special mode. In such a circuit for sensing high voltage, the adjustment of voltage to trip the inverting gate 3 can be accomplished only by controlling the threshold voltage of the field effect transistor. Furthermore, even if the circuit for sensing high voltage as described above can produce a signal to operate the circuit of special mode upon receiving input voltage thereto exceeding a certain voltage level, there is no way that the voltage applied to the input terminal can be further applied to the inside of the chip.